Well as the actual production specs for the efika has been announced I have been able to make some selections on what hardware will be used.

In the proposed architecture a wide spectum of radio signals are digitized by a high speed Analog to Digital converter. Currently the plan is to use a
AD6636
for this purpose

This is then followed by a coprocessor in this case an AD9446 to tak the data at a rate of aproxamatly 100 million samples per second and reduce it to a more managable 15k samples per second which is passed on to an fpga connected to the PCI interface on the EFIKA

Currently the transmit section is the recieve section in reverse but the actual hardware is still being selected

After the EFIKA has processed the data into an audio signal it formats it into a UDP packet for transmission to the user terminal via a 802.11g connection.