I search information about the write of a specific memcpy for a 8270 board configured in write through mode.

I have read, for example, this thread :
http://www.powerdeveloper.org/forums/vi ... sc&start=0

Does some new code have been integrated in libC ? Or this code need still to be written ?

It seems that using float64 help, but in aligned access otherwise you could have an interrupt.
Alignement to 64 bits help.
Alignement to cache line help also.

"Write multiple" instruction looks like to be the only means to generate a write burst to the memory in write through cache. This could be a candidate for the aligned cache line copy. Unaligned access could raise interrupt.

Cache hint instruction looks like a bad idea in write through mode.

Does i miss something ?