I'm trying to enable mscan controller in SmartFirmware and configure it for use with Linux OS.

I have already looked at another similar thread on this site(http://www.powerdeveloper.org/forums/vi ... php?t=1466).

After setting up ALT bits (MBAR+0xB00), and enabling CAN controller (MBAR+0x901 for CAN1), is there any other register that needs to be changed?

Also, where can I find some guidelines, or tutorial, that explains how to add interrupt definitions to this device (like interrupt properties for other controllers in device tree supplement)?

I'm not sure. I will take a look. In theory all you need to do is that, but I bet it is in fact a little more complicated. That should be the BARE minimum for handing off to Linux though.
Ah, well these are in the manual. There are 3 (or 4) classes of interrupt in the MPC5200B, Normal, Peripheral, Critical (and BestComm). They're in some order from 0-3 which is the first number in the interrupt definition (BestComm is 3, Peripherals I think is 2.. whatever I'm using in the device tree supplement for the devices there like audio).

Then the other numbers are the interrupt number (which is in a table 7-27 in Chapter 7 for peripherals - so MSCAN1 is "17" because it's marked as PEa17 - I have no idea why they didn't just use bit numbers) and the edge/level type of the interrupt (Efika uses 3 which I think is EDGE). So the interrupt property needs to be 3 cells; So for MSCAN it'd be..
You need the driver of course, that's up to you, but I think it's trying to be mainlined right now..

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Matt Sealey

Thank you for the answer, but yesterday I have found this description: http://www.mjmwired.net/kernel/Document ... ndings.txt

It is in draft, but it was enough to give me directions what and where to look.

It would be nice if someone from Genesi or bPlan can compile document that describes this kind of information (firmware, interrupts, how it interacts with kernel at boot, etc...), or atleast document with links where to look for information.
I will try to run patched peak driver (i hope it will be this week).

But, here is also another suggestion - Freescale gives BSP with their boards (there is also patched driver for CAN, and support for other onboard devices, I think). It would make a lot of people happy if Genesi could provide something like that for EFIKA, so someone that has almost no experience with Linux ( me :) ) can jump-start and test this board.

This is all covered by the IEEE 1275 specification and the usual best practises for CHRP and building devices with our kind of firmware.

We don't want to duplicate the documentation available as it just makes it confusing; by the time we have collated documentation, some of it changes (the MPC5200B device tree is still in flux as of this month) - we only make a big deal out of the differences, of which there should be very few or are plainly obvious looking at the device tree.
Our BSP is the mainlined Linux kernel (2.6.26) and we have a reference for drivers and expected functionality based on 2.6.19 on http://www.efika.de/ - features for all the chipset IP cores are either in mainline, the LinuxPPC Patchwork archive (http://patchwork.ozlabs.org/) or not yet written (not our problem, to be honest, however we will undertake the work for customers who have the requirement, large orders and are willing to negotiate a contract or firmware license).

The Peak CAN driver is pretty much all you need from this point in, you can use the Freescale BSP version (which is quite old) or there are updates I think on the OSELAS.Toolchain website which I think supports the MPC5200B (if it does not, there is a recent patch floating around.. I will need to check on it for you but you may have faster results looking for yourself)

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Matt Sealey

BTW. there's alternative to peak implementation, socketcan.

Socketcan has been merged some versions ago, but i don't see mscan driver inside, so maybe it's on socketcan ML or somewhere.

Ah, the OSELAS toolchain has Socketcan, and an MPC52xx driver in it, I just browsed the phyCORE-MPC5200B-tiny kit and found it.

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Matt Sealey