(originally posted in Polls by amigabill)

What is the better connection between PowerPC and FPGA?

Why do you prefer your choice?

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http://bbrv.blogspot.com

local bus?
pci bus?
other?
(realizing that not every PPC chip has every possibel bus/port option, but I'd appreciate advice)

Integrated
;-)

Not an option in my case. For my project the choices are PCI or the local bus, but I'd like to hear about other preferences as well in case other options are open in other projects.

But out of curiosity, is that a hardwired PPC core on the die (like Atmel FPslic AVR core was if you're familiar with that), or is it a soft core synthesized into the FPGA programmable array, leaving less remaining programmable area FPGA for other things?

Hi amigabill,

The answer to this question is not so trivial in fact :-).

• The local bus is an interesting option since it acts as a kind of "easy to use" parallel bus. Separate data/addresses/ctrl signals => you will only need a small amoung of logic for the interface on the FPGA side and writing it should be pretty straight forward (especially in non-MUXed modes (datasheet chapter 9.2). The ppc driver **should** also not be very hard to write.
• The PCI option has the major advantage of being fully standard and reusable. However the IP on the FPGA side will be much more complex. Your sw driver has to complies with the PCI subsystem of the OS you've chosen.

If you absolutely want to use the EFIKA (5k2), the first option (local bus) is (almost) impossible. In my opinion in requires too many modifications on the board (and I'm not sure all the signals you need can be easily "re-wired" to your I/F). We had this discussion with Matt a while ago.
In my opinion PCI is your best bet if you want to invest your time in something standard/reusable. However since I don't have more information on what you plan to do exactly (do I miss the post ?) these are "generic" answers.

If you don't need a lot of bandwidth, have you considered USB ? (I use this link for small I/O devices I've designed for the EFIKA and it's most of the time enough).

Also note that whatever I/F you choose (localBUS / PCI) you will probably have to include a bridge to another internal bus (Wishbone/Avalon/OPB...) as back-end for your IP in the FPGA. I assume you will probably add a memory controller and other IPs in your design.

I don't know what your experience in FPGA is (I make no assumption) but this kind of project is difficult and requires a lot of time especially if you don't plan to use commercial IPs.

Concerning the softcore question the Virtex5 does include "hardwired" PowerPC440 units. Softcores most of the time can't reach this level of performances.

I don't know what your budget is but keep in mind that Virtex devices are expensive components (and tools for using them too). (but I'm sure you were aware of that ;-)).

I hope it can help.

Best Regards,

Stellae

perhaps im mistaken but when i read
"What is the better connection between PowerPC and FPGA?

Why do you prefer your choice?
"
Stellae, the implication was that it was for a potential "test batch" of Efika with an FPGA of some sort included and interfaced Onboard ?

assuming that is the case,and depending on the FPGA picked ,such as those Virtex(R)-5 FXT devices With PowerPC 440 Processor Blocks, then you could make use of those cores as Co-Processors to the main Efika PPC chip perhaps.

you make good points about the logic and the high prices of these OC, and the use of commercial IPs would be also potentially be high.

but id hope the object from the start would be to try and take the available open IP and use that instead, in any such future Efika/FPGA board and write our own Open IP to use and build on for the future Efika projects.

collecting open FPGA Embedable AVC,Divx/Xvid,and so on codebase's if available.., is a good thing id hope.

and while its fine to use USB for low speeds, wouldnt it be far better to use something like PCIe2 for far longer term growth, and show some innovation that people might actually buy...
just as, finally, software programable wireless chips are coming down, and getting wider apeal, old is easy, looking to, and producing the future is harder but far more profitable in the long term

No, it wasn't.
No.

_________________
Matt Sealey

[quote="stellae"][/quote]

Thanks for the tips. I'm not talking about Efika. I'm looking at some of the PowerQuicc options which have more bus connections to choose from than Efika does. I'm just looking into what would be the best connection for an FPGA, should I build a generic platform that could be used by a variety of different users/applications, which CPU/FPGA connection would be most useful/preferrable to the most users/applications.

New question. Is there a big performance penalty or benefit to using local bus instead of pci?

I'm not sure why people assumed I was talking about Efika. I am not.
I'd thought about that as well, but I think that this may be a bit more advanced than I'm able to make use of. I can get a PCI IP from opencores, but I don't think they have PCIe IP yet. I'm not looking to buy IP, and I think a PCIe endpoint would be rather expensive anyway. Sure, others could probably make use of that, but I may not choose a PPC with PCIe to do that with, and I may not choose an FPGA capable of it either, and if so I'd like to be able to play with it myself, but I think PCIe is beyond my own capabilities right now.

There should be no performance penalty on either side but if you use LocalPlus to access the FPGA you'll of course need to manually drive the LocalBus to access the FPGA.

If you implement PCI, you get to write less drivers, and also get the advantage of configuration space and reported memory/io locations rather than them beibg subordinate to the LocalPlus at some fixed, per-board address (PCI can be remapped and keep seperate memory on the FPGA from FPGA IO locations).

However, the overhead of PCI access could be more than manually driving LocalPlus (which simply has address/data tenures and is much simpler). You may think of it as PCI with all the PCI specification (and specialisation) stripped out - and in fact, it's implemented this way on the MPC5200B - LocalPlus and PCI and ATA are all handled by the PCI arbiter, to reduce the amount of external logic required to support these devices.

On another chip such as PowerQUICC it may be seperate.

Personally I'd implement it over PCI simply because PCI is more comfortable and driver access is well documented and standardised. You are beholden to your purchased or otherwise acquired PCI IP core, but they are so mature it does not matter about performance or stability so much as how many gates you're willing to devote to it (a LocalPlus IP core on the FPGA would be less, but also probably require some work and extra logic to drive it on both sides).

With PCI you also get to drop your FPGA on a PCI bus with any number of other devices without much care for board design outside of that you would generally do for PCI devices anyway - including the option to implement your FPGA as a PCI card during development and simply move it to the board later.

But you knew all that :)

All in all, it doesn't really matter. If the scope of your end device is not to be a plugin card and you want to use it on devices that do not have PCI but a simpler bus, LocalPlus is probably a better start, but if you want to be up and running without a lot of driver work on the OS side, go for PCI.

_________________
Matt Sealey