hello there,

i'm interested in custom operating system development for Pegasos systems, but i wasn't lucky, when was looking for documentation for marvell discovery2 chipset. registration on marvell.com homepage didn't work for me, and i didn't find it anywhere else...

could someone provide some information about the chipset, or better to send me the documentation, or atleast the location? google didn't success...

thanks in advance.

bye, MarK.

ps: well, i have also pegasos1, so articia2 chipset docs would satisfy me for a while :)

What do you need the Marvell documentation for, EXACTLY?

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Matt Sealey

well, i'm interested in writing my own simple operating system, but i know quite well only the powerpc cpus, because it's well documented. but cpu is not enough to write an os... i need to get all the important addresses etc to learn more and to be able to write the os. this is my first try to write something like this, so that's why do i need it.

thanks for Your reply.

bye, MarK.

ps: and i don't want to get sticked with linux sources (if it won't be really needed)...

There is a single Linux header you need to look at (mv63xxx.h or something very similar) which contains all these addresses.

On Pegasos you must NOT touch the configuration of the Marvell chip, nor would we recommend doing PCI space accesses outside of RTAS. It is set up by the firmware, and handled by the firmware, if you toy with it you can damage your system. The interrupt controller is a standard PC i8259 interrupt controller, in the southbridge. This is very well documented online (google for i8259 datasheet). The southbridge and firewire controller also (google for vt8231 datasheet or vt6305 datasheet).

I can understand you might need the real documentation for the Marvell gigabit ethernet ports, but to get that; you really must talk to Marvell. However 99.9% of what is in the documentation - merely a list of recommended practises and register definitions - is in the Linux source. If you have ever programmed an ethernet driver before it is pretty obvious. The same goes for the internal DMA controller (although Linux does not have a mainline driver for this yet.. most of it is in there)

Genesi is not authorized - as is anybody in any industry - to give out NDA documentation of this kind. You will not see ASUS or PC-Chips handing hobby OS vendors a bunch of secret documentation on the latest Intel chips :)

There will be a page up over the weekend (like the one we did for the Efika) which goes into detail on what component is what, what you should touch and provide all the documentation that is available to users. Effectively it will replace this post :)

We have had good experiences with guys like Miray.de porting munOS - they only had to be coached a little onto where to find the documentation and a little clarification on whether things were edge- or level-driven, but they managed to port a whole OS without touching a single Marvell feature bit.

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Matt Sealey

thanks for everything... i got several hundreds pages of documentation to study, so i suppose, soon i will have another questions...

thanks again!

bye, MarK.