All times are UTC-06:00




Post new topic  Reply to topic  [ 5 posts ] 
Author Message
PostPosted: Mon Oct 02, 2006 1:32 am 
Offline

Joined: Sun Mar 06, 2005 9:23 pm
Posts: 2
Location: Poland
My two new scientific papers about optimizing FIR filters on AltiVec has been published. Both of them are about optimizing long FIR-s operating on long (or unlimited) streams of [audio] data. The first one, titled "Fast FIR Filters for SIMD Processors With Limited Memory Bandwidth" (PDF) has been published on XI Symposium AES "New Trends in Audio and Video" in Bialystok, describes floating point filters, while the second one, "Performance Analysis of Alternative Structures for 16-bit Integer FIR Filter Implemented on AltiVec SIMD Processing Unit" (PDF) published on IEEE Workshop of Signal Processing in Poznan, concentrates on 16-bit integer filters. There is also a seminar presentation of the second one. References to the source code and benchmarks are placed inside papers. For long filters (1000 taps or more) I've achieved 2.5 Gtaps per second for floating point filter and 6.5 Gtaps per second for integer filter. All this on 1.0 GHz 7447 unit and Pegasos II. Presented ideas are implemented in a class of Reggae multimedia framework for MorphOS.


Top
   
 Post subject:
PostPosted: Mon Oct 02, 2006 6:16 am 
Offline
Genesi

Joined: Fri Sep 24, 2004 1:39 am
Posts: 1422
That is great Krashan. 8)

We will check it out!

R&B :)

_________________
http://bbrv.blogspot.com


Top
   
PostPosted: Tue Oct 03, 2006 1:09 pm 
Offline

Joined: Wed Oct 13, 2004 7:26 am
Posts: 348
Quote:
My two new scientific papers about optimizing FIR filters on AltiVec has been published. Both of them are about optimizing long FIR-s operating on long (or unlimited) streams of [audio] data. The first one, titled "Fast FIR Filters for SIMD Processors With Limited Memory Bandwidth" (PDF) has been published on XI Symposium AES "New Trends in Audio and Video" in Bialystok, describes floating point filters, while the second one, "Performance Analysis of Alternative Structures for 16-bit Integer FIR Filter Implemented on AltiVec SIMD Processing Unit" (PDF) published on IEEE Workshop of Signal Processing in Poznan, concentrates on 16-bit integer filters. There is also a seminar presentation of the second one. References to the source code and benchmarks are placed inside papers. For long filters (1000 taps or more) I've achieved 2.5 Gtaps per second for floating point filter and 6.5 Gtaps per second for integer filter. All this on 1.0 GHz 7447 unit and Pegasos II. Presented ideas are implemented in a class of Reggae multimedia framework for MorphOS.
Krashan,
These are excellent papers and the results are astonishing!!! I am very interested to study the source code in detail, as soon as I'm "free" again (a few more days, just a few :-D) from my military service!

What I find very intriguing is the possibility that these algorithms may be applied to image processing applications as well, like GIMP, in particular the digital convolution filters, which I believe work in the same or similar way. Esp, since your code applies to "real" data -ie big data and not just "Proof of Concept" lab tests.

Keep them coming!

Konstantinos


Top
   
 Post subject:
PostPosted: Wed Oct 04, 2006 12:55 am 
Offline
Genesi

Joined: Fri Sep 24, 2004 1:39 am
Posts: 1422
@markos

In Krashan, we think we found an agile development partner for you. After all, look at his Pegasos:

http://www.chal.republika.pl/album/slides/PICT3587.html

Take another look:

http://www.chal.republika.pl/album/slides/PICT3588.html
http://www.chal.republika.pl/album/slides/PICT3590.html

R&B :)

_________________
http://bbrv.blogspot.com


Top
   
PostPosted: Wed Oct 04, 2006 2:07 am 
Offline

Joined: Tue Jan 31, 2006 1:18 am
Posts: 49
Location: Bialystok, Poland
Quote:
What I find very intriguing is the possibility that these algorithms may be applied to image processing applications as well, like GIMP, in particular the digital convolution filters, which I believe work in the same or similar way. Esp, since your code applies to "real" data -ie big data and not just "Proof of Concept" lab tests.
Of course the principle of reducing memory accesses and paralellizing computations is valid for 2D convolutions. It will be the next step and results will be published in my Ph. D. dissertation which is about optimizing DSP algorithms for SIMD units placed in systems with limited memory bandwidth.

_________________
http://krashan.ppa.pl


Top
   
Display posts from previous:  Sort by  
Post new topic  Reply to topic  [ 5 posts ] 

All times are UTC-06:00


Who is online

Users browsing this forum: No registered users and 8 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum

Search for:
Jump to:  
PowerDeveloper.org: Copyright © 2004-2012, Genesi USA, Inc. The Power Architecture and Power.org wordmarks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org.
All other names and trademarks used are property of their respective owners. Privacy Policy
Powered by phpBB® Forum Software © phpBB Group